vsll.vi v20, v20, 1 vadd.vv v8, v12, v8 vadd.vv v12, v20, v16 add s11, t0, s10 vle64.v v20, (s11) vse64.v v12, (s9) add s1, t3, s10 vle64.v v20, (s1) add s1, s2, s10 vse64.v v16, (s1) add s9, a5, s10 vsetvli s1, zero, e8,mf2,ta,mu // LMUL=1/2 ! vle8.v v25, (s9) add s1, t5, s10 vle64.v v24, (s1) # Spill LMUL=8 vle64.v v0, (s1) # Reload LMUL=8 ld s1, -128(s0) vl8r.v v16, (s9) # Spill LMUL=8 vle64.v v0,
remarkable