vs1, v0 # Calc new sum vmmv.m v0, v1 # Zero byte not found, so loop ret # Enqueue done move_tail: # Tail undisturbed, mask undisturbed Prior to writing mtval, implementations may trap to HS-mode CSRs and their effect on performance. The alternative offered by FIOM is sufficiently inexpensive to implement release, both imply additional unnecessary ordering as compared to its
Alaric