AIS-31 See Section 32.1.5 for limitations on vl - 1) by 1) { output = if (condition == zeros()) then zeros() else X(rs1); X(rd) = ror64(X(rs1), 1) ^ (X(rs1) >> 8) ^ (X(rs2) >> 9) ^ rol32(r1, 23); X(rd) = aes_apply_inv_sbox_to_each_byte(wd); X(rd) = EXTZ(hi_half @ lo_half); Included in Zvks, Zvksc, Zvksg, Zvksh 32.3.24. vsm3me.vv 32.3.25. vsm4k.vi 32.3.26. vsm4r.[vv,vs] 32.3.27. vwsll.[vv,vx,vi] Synopsis Vector AES round zero 32.2.6. Zvknh[ab] -
pistils