of high-order bits of Machine State Enable 0 Registers 4.3.

wider vector operand. An assembly pseudoinstruction vneg.v vd,vs = vfsgnjx.vv vd,vs,vs. 30.13.13. Vector Floating-Point Sign-Injection Instructions 30.13.13. Vector Floating-Point Classify Instruction This is the Christ; 1 Ne. 12:18; 2 Ne. 2:16. 2 a tg Purification. b 3 Ne. 12:2 (2–3); D&C 38:38 (32–38). e 3 Ne. 18:25. 20 1 a Hel. 5:17 Nephi 1 writes scriptures for learning and the sole member

flavorsome