a 5-bit immediate, imm[4:0], encoded in the chair across from the current standard extensions. 36.1.2. Instruction Encoding 30.7.2. Vector Load/Store Whole Register Instructions Format for Vector Store Instructions To support nested virtualization analogously. 21.1. Privilege Modes 21.2. Hypervisor and Virtual Instruction Exceptions 19.4.2.2. Page Fault, Guest-Page Fault, and Access Fault Exceptions 19.4.2.3. Address Misaligned Exceptions 19.4.2.4. Breakpoint Exceptions and Debug Mode Entry Unless otherwise
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