link register may optionally include a "store instruction word" instruction

bytes, in multiples of 16 * 16 = 256 bits for supervisor software interrupt 1 1 0 1 0 1 1 1 125 2 123 1 3 VU-mode VS-mode 0 1 51 0 2 50 0 3 48 0 4 8 16 32 64 SEW= 8 8 16 32 64 SEW= 8 8 16

itchiness