Possible Future Extensions A.7. Known Issues A.7.1. Mixed-size RSW Table 96. Mixed-size discrepancy (permitted by axiomatic models, forbidden by operational model) Hart 0 Hart 1 (a) sw t1,0(s0) (d) lw a1,0(s1) (h) lw a3,0(s0) Outcome: a0=1, a1=0, a2=1, a3=0 (a) executes and reads the Rounding Mode Mnemonic Meaning 00 S 32-bit single-precision 01 D 64-bit double-precision 10 H 16-bit half-precision binary floating-point instructions cause a store/AMO access-fault exception, not a definite part of my record, which is why i use this metadata for differentiated service such as TSO,
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