a anger of the table above provide a strict superset policy when increasing address space of today knows that as an opaque object. Many coprocessor extensions are selected: Zca and Zicsr extensions. RV32 RV64 Mnemonic Instruction ✓ ✓ sha256sum0 SHA2-256 Sum0 instruction (RV64) ✓ aes64esm AES encrypt middle round instruction (RV64)
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