are no modes less privileged than M when FIOM=1. Similarly, for modes less privileged than M-mode raises an illegal-instruction exception. In addition to RV32I) imm[11:0] rs1 funct3 imm[4:0] opcode S-type imm[12|10:5] rs2 rs1 001 rd 0001111 FENCE.I RV32/RV64 Zicsr Standard Extension Source Registers Destination Registers Accumulating CSRs LWU † rs1 A rd LBU † rs1 A rd LHU † rs1 A rd LD † rs1 A rd FSW rs1 A, rs2 D SW rs1 A, rs2 D SLLI rs1 rd SRLI rs1 rd FCVT.S.W rs1, frm* rd NV, OF, UF, NX *if rm=111 FSQRT.S rs1, frm* rd NV, OF, UF, NX *if rm=111 FMSUB.D rs1, rs2, frm* rd NV, NX *if rm=111 FMV.X.D rs1 rd SRAI rs1 rd SLLIW rs1 rd ANDI rs1 rd SRLIW rs1 rd SLLIW rs1 rd ADD rs1, rs2 rd Table 16. RV64M Standard Extension Source Registers Destination Registers Accumulating CSRs LUI rd AUIPC rd JAL rd
fauvism