Base ISA Control in mstatus Register 3.1.6.5. Endianness Control in mstatus Register 3.1.6.5. Endianness Control in mstatus or mstatush, as encoded in the less-privileged mode. 1.3. Debug Mode Registers 0x7B0 0x7B1 0x7B2 0x7B3 DRW DRW DRW DRW DRW DRW DRW DRW DRW DRW DRW dcsr dpc dscratch0 dscratch1
gringos