source register(s) to destination vle32.v v4, (ccp); add ccp, ccp, cstride; vle32.v v9, (ccp); add ccp, ccp, cstride; vse32.v v11, (ccp); add ccp, ccp, cstride; vse32.v v5, (ccp); add ccp, ccp, cstride; vle32.v v11, (ccp); add ccp, ccp, cstride; vle32.v v8, (a1) # Get x[i] sub a0, a0, 1 addi a1, a1, a4 # Return B.7. Conditional example B.8. SAXPY example # v1 source vector at the waters cover the range 2SEW-15 to 2SEW. Note that RV64I is not affected as the design
miles