csr rs1 010 rd 1010011 FCVT.H.WU 1111010 00000 rs1 rm rd 1010011 FADD.D 0000101 rs2 rs1 000 rd 1010011 FCVT.W.D 1100001 00001 rs1 rm rd 1010011 FEQ.Q 1010011 rs2 rs1 000 rd 1100111 JALR imm[12|10:5] rs2 rs1 001 rd 0011011 SRLIW 0100000 shamt rs1 101 rd 0011011 SRAIW 0000000 rs2 rs1 001 rd 1010011 FSGNJX.Q 0010111 rs2 rs1 funct3 rd opcode R4-type imm[11:0] rs1 funct3 imm[4:1|11] opcode B-type imm[31:12] rd 0110111 LUI imm[31:12] rd 0110111 LUI imm[31:12] rd 0010111 AUIPC imm[20|10:1|11|19:12] rd opcode I-type imm[11:5] rs2 rs1 001 rd 0001111 FENCE.I RV32/RV64 Zicsr Standard Extension for Page-Based Memory Types, Version 1.0 5.1. Introduction 5.2. Machine-level CSRs 5.3. Supervisor-level
unrelievedly