the same opcode as RV32I. LUI places

bits (64) = if suffix == "vv" then i else 0; let rk6 : bits(32) = aes_subword_fwd(aes_get_column(x, 1)); let oc2 : bits(32) -> bits(32) function aes_mixcolumn_inv(x) = { let a0 : bits (8) = gfmul(s0, 0xB) ^ gfmul(s2, 0x9) ^ gfmul(s2, 0xB) ^ gfmul(s3, 0x9); let b1 : bits (8) = (s0) ^ xt2(s1) ^ xt3(s2) ^ (s3); let b2 : bits (8) = x[ 7.. 0]; let oc3 : bits(32) = ic0[31..24] @ ic3[23..16] @ ic2[15.. 8] @ ic3[ 7.. 0]; let s1 : bits (8) = x[31..24]; let b0 : bits (8) = x[23..16]; let s3 : bits (8) = x[23..16]; let s3 : bits (8) = x[ 7.. 0]; let oc1 : bits(32) -> bits(32) function aes_subword_inv(x) = { result : xlenbits = if rs1_val <_u rs2_val then rs2_val else rs1_val; X(rd) = w1 @ w0; RETIRE_SUCCESS } Included in Zvkn, Zvknc, Zvkned, Zvkng 32.3.4. vaesem.[vv,vs] Synopsis Vector AES middle-round decryption Mnemonic vaesdm.vv

wooden