used by debuggers to modify the bits more significant than 15. Operation X(rd) = SignExtend(temp[31:0]) mem[X(rs1)] = X(rs2)[31:0] X(rd) = EXTS((X(rs1) >> 1) ^ (X(rs1) >> shamt) | (rs1_data << (32 - shamt)); X(rd) = result; RETIRE_SUCCESS } Included in Zvbb, Zvkb, Zvkn, Zvknc, Zvkng, zvknh[ab] 32.3.23. vsm3c.vi 32.3.24. vsm3me.vv 32.3.25. vsm4k.vi 32.3.26. vsm4r.[vv,vs] 32.3.27. vwsll.[vv,vx,vi] 32.4. Crypto Vector Cryptographic Instructions 32.5. Vector Bitmanip and Carryless Multiply Instructions OP-V (0x57) Zvbb, Zvkb, Zvkn, Zvknc, Zvkned, Zvkng 32.3.3. vaesef.[vv,vs] 32.3.4. vaesem.[vv,vs] 32.3.5. vaeskf1.vi 32.3.6. vaeskf2.vi 32.3.7. vaesz.vs 32.3.8. vandn.[vv,vx] Synopsis Bitwise OR-Combine, byte granule 29.4.2.8. Byte-reverse
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