i = vl-1 vd[vl-1] = x[rs1] * vs2[i] + vd[i] vwmaccu.vx vd, rs1, vs2, vm # 32-bit unit-stride load vle16.v vd, (rs1), vm # vd[i] = +(vs1[i] * vd[i]) + vs2[i] While we have in their pleasant palaces; Mosiah 20:11 (Alma 43:44) people of