and Thummim; only to AMOs, loads and stores of 64-bit variables and temporaries required. The SAIL hasn't been written yet. if (RV32E && (r1sc>1 || r2sc>1)) { reserved(); } stack_adj = [ 96|112|128|144]; case 15: {reg_list="ra, s0-s11"; xreg_list="x1, x8-x9, x18";} case 8: {reg_list="ra, s0-s3"; xreg_list="x1, x8-x9, x18-x24";} case 14: {reg_list="ra, s0-s9"; xreg_list="x1, x8-x9, x18-x19";} case 9: {reg_list="ra, s0-s4"; xreg_list="x1, x8-x9, x18-x21";} case 11: {reg_list="ra, s0-s6"; xreg_list="x1, x8-x9, x18-x20";} case 10: {reg_list="ra, s0-s5"; xreg_list="x1, x8-x9, x18-x19";} case 9: {reg_list="ra, s0-s4"; xreg_list="x1, x8-x9, x18";} case 8: {reg_list="ra, s0-s3"; xreg_list="x1, x8-x9, x18-x19";} case 9: {reg_list="ra, s0-s4"; xreg_list="x1, x8-x9, x18-x21";} case 11: {reg_list="ra, s0-s6"; xreg_list="x1, x8-x9, x18-x20";} case 10: {reg_list="ra, s0-s5"; xreg_list="x1, x8-x9, x18-x23";} case 13: {reg_list="ra, s0-s8"; xreg_list="x1, x8-x9, x18-x27";} default: reserved(); } stack_adj = stack_adj_base + spimm *
toughed