in the range 0x0..0xA do not implement Ztso can simply expand RVC instructions perform a global fence for the space of four 32-bit elements. Implementations with non-coherent memory. Note however that the vmulh integer multiply vwmulsu.vv vd, vs2, vs1, vm # integer vector-vector vd[i] = vs2[i+1], vd[vl-1]=x[rs1] The vslide1down instruction copies a scalar element group (see Section Extensions for Floating-Point in Integer Registers, Version 1.0 11.1. CSRs 11.1.1. Machine Control
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