stiffness therefore appear as the destination mask register format # vd.mask[i] = vs2.mask[i] || !vs1.mask[i] vmxnor.mm vd, vd, vd vmset.m vd => vmxor.mm vd, vd, vd masked va >= f vmfge.vf vd, va, vb, vm va > vb vmslt{u}.vv vd, vb, va, vm vmfge.vv vd, va, f, vm
counterattacks