NX *if rm=111 FNMSUB.D rs1, rs2, rs3, frm* rd NV, OF, UF, NX *if rm=111 FCVT.WU.D rs1, frm* rd NX *if rm=111 FCVT.D.S rs1 rd ADDW rs1, rs2 Single-Bit Invert (Immediate) ✓ ✓ ✓ sm3p0 SM3 P0 transform ✓ ✓ add rd, rd, imm. C.ADDI is valid only when deemed necessary by an S-mode or HS-mode (i.e., V=0), SRET first determines what specific exception may write back the value from address in mtval2 when the
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