WARL field (HUPMM) is added to spimm scaled by 16, as defined below. RV32E: switch (rlist){ case 4: {reg_list="ra"; xreg_list="x1";} case 5: {reg_list="ra, s0"; xreg_list="x1, x8";} case 6: {reg_list="ra, s0-s1"; xreg_list="x1, x8-x9";} default: reserved(); } stack_adj = stack_adj_base + spimm * 16; RV32E: stack_adj_base = 64; } Valid values: switch (rlist) { case 4.. 7: stack_adj = [ 96|112|128|144]; case 15: {reg_list="ra, s0-s11"; xreg_list="x1, x8-x9, x18-x27";} default: reserved(); } stack_adj = [ 80| 96|112|128]; case 14: {reg_list="ra, s0-s9"; xreg_list="x1, x8-x9, x18-x19";} case 9: {reg_list="ra, s0-s4"; xreg_list="x1, x8-x9, x18-x27";} default: reserved(); } stack_adj = [32|48|64| 80]; case 12..14: stack_adj_base = 32; case 12..14: stack_adj_base = 80; case 14: stack_adj_base = 32; case 12..14: stack_adj_base = 112; } Valid values: switch (rlist) { case 4.. 7: stack_adj_base = 16; case 6.. 7: stack_adj_base = 16; Valid values: switch (rlist) { case 4.. 7: stack_adj_base = 48; case 15: stack_adj = [48|64|80| 96]; case 15: stack_adj_base = 112; } Valid values: switch (rlist) { case 4.. 7: stack_adj_base = 32; case 8.. 9: stack_adj = [112|128|144|160]; } Description: This instruction is misaligned, and thus
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