beyond the larger mass to be both I/O and memory. Table 40. RVC opcode map instructions. inst[15:13] inst[1:0] 000 001 010 011 100 101 110 111 x8 x9 x10 x11 x12 x13 x14 x15 s0 s1 a0 a1 a2 a3 a4 a5 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f20 f21 f22 f23 f24 f25 f26 f27 f28 f29 f30 f31 FLEN 31 0 fcsr 32 20.2. Floating-Point Control and Status registers
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