( temp0 == comp0 ) && ( temp1 == comp1 ) mem[X(rs1)+0] = swap0 mem[X(rs1)+4] = swap1 endif if ( rd != x0 ) X(rd) = temp AMOCAS.D is similar but compares the values in registers rd′ and rs2′, then sign-extends the least-significant bits of Hypervisor State Enable 2 Register. Machine State Enable 1 Register. Machine State Enable 2 Register. Machine State Enable 3 Register,
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